Binod Kumar

Hi, I am working as an Assistant Professor in Electrical Engineering department at IIT Jodhpur (IITJ). You can reach me at binod@iitj.ac.in

Office Location: Room No.- PHY 209 (1st Floor), Physics Building (adjacent to Electrical Engineering building), IIT Jodhpur

Broad Research Interests: Hardware Design for AI, VLSI CAD & EDA, Reconfigurable Computing (FPGA-based system design), Formal and Semi-formal Design Verification, Hardware Security and Trust

List of Publications: Google Scholar, DBLP

I have received Ph.D. (alongwith Masters) in Electrical Engineering from Indian Institute of Technology Bombay (IITB). Before Joining IITJ, I spent ~2 years at Qualcomm India working in test and debug strategy development for some of the most advanced and complex chipsets of the industry. I have a Bachelor of Technology degree in Electronics & Communication Engineering (ECE) from National Institute of Technology Silchar (NITS).

Course(s) Taught/Teaching:

July-Nov 2021: Formal Verification, Engineering Realization (Embedded Hardware Component)
Jan-May 2022: Embedded Systems, Digital Systems Laboratory, VLSI Testing, High Level Synthesis (jointly with other colleagues)
July-Nov 2022: Formal Verification
July-Nov 2022 (Visiting Faculty @NRTI Vadodara): Introduction to Electrical & Electronics Engineering, Electronic System Design: Analog Electronic Devices
Jan-May 2023: Embedded Systems, Digital Systems Laboratory, Hardware-software Co-design
July-Nov 2023: Formal Verification, Digital ASIC Design Lab
Jan-May 2024: Embedded Systems[ Minor 1 QP , Minor 2 QP ], Digital Systems Laboratory, Hardware-software Co-design[ Minor 1 QP , Minor 2 QP , Major QP ] Hardware Design for AI [ Minor 1 , Minor 2 , Major]
July-Nov 2024: Formal Verification, Digital ASIC Design Lab, Processor Design, Network-On-Chip
Jan-May 2025: Embedded Systems, Digital Systems Laboratory, Hardware-software Co-design Hardware Design for AI, ML in VLSI CAD

Other information: LinkedIn

Updates:

Jan 25: Our work is accepted in Embedded System Letters: Lightweight Surveillance Image Classification Through Hardware-Software Co-Design
Dec 24: Paper accepted at IEEE TIM: On-Chip Implementation of Neural Network Based Classifier Models For E-nose With Chemometric Analysis [Collaborative work with IIITA]
Nov 24: Elevated to Senior Member, IEEE
Oct 24: Papers accepted at Asian Test Symposium-2024: MEMFD: A Multi-EDT Multi-Fault Scan Chain Diagnosis Methodology with Deep Learning, LLM-aided Front-End Design Framework For Early Development of Verified RTLs
Oct 24: Paper accepted at VLSID-2025: Multi-Object Detection through Meta-Training in Resource-Constrained UAV-based Surveillance Applications
Sept 24: Two papers accepted at IEEE-iSES'24 : Harnessing Knowledge-Distillation for Lightweight AI-Implementation on Resource-Constrained Device, A Reconfigurable Floating-Point Compliant Hardware Architecture for Neural Network Implementation
Sept 24: Received Distinguished Teacher Award from IIT Jodhpur
May 24: Two papers accepted at ISOCC'24 : Resource-efficient DL Model Inference with Weight Clustering and Zero-skipping, Lightweight DL-based Drone Image Classification for Surveillance Applications
Apr 24: Received Qualcomm Faculty Award
Jan 24: Patent granted (design bug localization)
Aug 23: Paper accepted at ATS-2023: A Case Study on Formally Verifying an Open-source Deep Learning Accelerator Design [Work done with Anshul Jain (Intel)]
July 23: Delivered an expert talk in Karyashala workshop on AI/ML Algorithms and Applications in VLSI Design and Technology at DAIICT, Gandhinagar.
MTech student Sourav placed in IBM hardware EDA R&D.
June 23: Temporary Job opening
Mar. 23: BTech. students (Chirag and Aryan) begin 3-month long virtual internship at IBM for hardware debug enhancement
Nov. 22: Temporary Job Opening for SERB-funded project
Oct. 22: Paper titled "Network-on-Chip Trust Validation using Security Assertion" accepted at Springer Journal of Hardware and Systems Security (HASS). Collaborative work with Prof. Mishra (Univ. of Florida).
September 2022: SERB-funded project on "Specification-guided Design of Intelligent, Secure and Dependable Hardware Architectures for Edge Computing Applications" approved.
September 2022: Paper "Blood Pressure Estimation from ECG Data Using XGBoost and ANN for Wearable Devices" accepted at ICECS 2022 Congratulations to Sourav (MTech. student).
August 2022: Temporary Job opening (extendable upto 20 months) in funded project.
August 2022: ATS-2022 paper accepted (Deep Learning-assisted Scan Chain Diagnosis with Different Fault Models during Manufacturing Test). Congratulations to Sourav (MTech. student) and Utsav Jana (Intel).
May 2022: Funded research project on "Development of Hardware Trojan Testing Methodology" approved. Funding agency: SAG (DRDO)
April 2022: Talk given at IIT Tirupati on "Hardware Design for AI"
March 2022: IEEE TCAD paper (Aries: A Semi-formal Technique for Fine-grained Bug Localization in Hardware Designs) accepted
Jan 2022: Invited paper (Hardware Accelerator Design for Healthcare Applications: Review and Perspectives) accepted at ISCAS-2022